The present invention relates to integrated circuits and semiconductor device fabrication and, more specifically, to methods of forming interconnects.
An interconnect structure may be used to electrically connect device structures fabricated by front-end-of-line (FEOL) processing. A back-end-of-line (BEOL) portion of the interconnect structure may include metallization formed using a damascene process in which via openings and trenches etched in a dielectric layer are filled with metal to create features of a metallization level. Copper is a common material used in the metallization of the BEOL portion of the interconnect structure.
Improved methods of forming interconnects are needed.